1. Field of the Invention
The present invention relates to shift registers and more particularly, to a shift register the length of which may be varied in accordance with a control signal.
2. Description of the Prior Art
Shift registers are frequently used as delay lines for delaying a digital binary signal by a particular number of clock pulses or time slots corresponding to the length of the shift register. The signal is inputted to one end of the shift register and is clocked therethrough and provided at an output a number of clock pulses later, depending upon the length of the shift register.
There are occasions in logic design where it may be desirable to use a shift register having a variable length, the length depending on a control signal.
Normal shift registers are of a fixed length and therefore do not have the ability to provide a variable delay circuit.